KSPIConf Struct Reference

Spi configuration structure. More...

#include <spi.h>

Data Fields

SPIRole role
 The role of the SPI bus. More...
 
SPIDirection direction
 The communication mode of the SPI bus. More...
 
SPIDataSize data_size
 The amount of data in each transmit/receive of the SPI bus. More...
 
SPIClockPhase clock_phase
 The clock phase of the SPI bus. More...
 
SPIClockPolarity clock_polarity
 The clock polarity of the SPI bus. More...
 
SPIFirstBit first_bit
 The bit ordering of the SPI bus communication. More...
 
uint32_t speed
 The baud rate of the SPI bus. More...
 

Field Documentation

SPIClockPhase KSPIConf::clock_phase

The clock phase of the SPI bus.

Can either be low (idle state = 0, active state = 1), or high (idle state = 1, active state = 0), as specified by the SPIClockPhase enumerator

SPIClockPolarity KSPIConf::clock_polarity

The clock polarity of the SPI bus.

Can either be the first edge (falling if clock phase is high, rising if clock phase is low), or second edge (rising if clock phase is high, falling if clock phase is low), as specified by the SPIClockPolarity enumerator

SPIDataSize KSPIConf::data_size

The amount of data in each transmit/receive of the SPI bus.

Can either send 8-bits at a time or 16-bits, as specified by the SPIDataSize enumerator

SPIDirection KSPIConf::direction

The communication mode of the SPI bus.

Can be 2-wire Rx/Tx, 2-wire Rx only, or 1-wire bidirectional, as specified by the SPIDirection enumerator

SPIFirstBit KSPIConf::first_bit

The bit ordering of the SPI bus communication.

Can be either least-significant bit first, or most-significant, as specified by the SPIFirstBit enumerator

SPIRole KSPIConf::role

The role of the SPI bus.

Should be either master or slave, as specified by the SPIRole enumerator

Warning
Only the Master role is available as of v0.1.0
uint32_t KSPIConf::speed

The baud rate of the SPI bus.

Warning
For the STM32F4 and MSP430F5 microcontrollers, the speed of the SPI bus can only be defined as a factor of the peripheral clock to which it's connected (PCLK1 for STM32F4 SPI bus 2 and 3, PCLK2 for STM32F4 SPI bus 1, SMCLK for MSP430F5 SPI buses). For example, PCLK_speed / 2. To make things easier, this speed field will take a normal baud rate number and then it will automatically be converted to the nearest available system speed without exceeding the original value.
For example:
Given conf.speed = 10MHz, PCLK_speed = 84MHz
The closest speed without going over is 5.25Mhz (PCLK_speed / 16), so this is what the SPI bus speed will be set to.

The documentation for this struct was generated from the following file: